An Acronym for Microprocessor without Interlocked Pipeline Stages.
A simple RISC CPU design geared for Compiler friendliness. Its instruction set is very simple and easy to learn and was used for many years as a teaching architecture for the Computer Systems course at WaikatoUniversity before being replaced with a full custom design.
It was the result of a StanfordUniversity project that became a commercial product, best known as the heart of many Silicon Graphics machines as well the original Sony PlayStation. The design is now owned by MIPS Technologies, a wholly-owned subsidiary of SGI since 1992 that operates as an independent unit and make almost all of their money licensing processor core designs to other manufacturers who embed them into their own products.
8 pages link to MIPS: