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Newer page: version 72 Last edited on Monday, April 19, 2010 6:37:58 pm by PerryLorier
Older page: version 71 Last edited on Monday, April 19, 2010 9:19:00 am by FredrickHithers Revert
@@ -6,9 +6,8 @@
 $ make foo 
 cc foo.c -o foo 
 </verbatim> 
 make(1) will detect the type of file and compile it for you, automatically naming the executable the same as the input file (gcc(1) foo.c will give you a file called a.out unless you manually specify a name for it). If you need libraries, you can specify them by setting the __LDFLAGS__ variable on the command line. 
-[Language Tools | http://www.unitransservice.org]  
  
 Of course, most useful projects contain more than one file. __A makefile describes the dependencies between files.__ It is called Makefile (with a capital M). Each line will typically consist of a filename, a colon and a list of dependencies. for instance, a simple make file to link together two object files foo.o and bar.o might look like: 
 <verbatim> 
 program: foo.o bar.o